University of California, Berkeley
COMPSCI 150 — Components and Design Techniques for Digital System
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Lecture 3 FPGA Technology
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Controller Interface Project Checkpoint 1
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Storage Technologies SDRAM and DRAM
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Combinational Logic Circuits (Lecture 11)
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Verilog FSM Lab 5
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Tool Flow for FPGA CAD (Lab 2)
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Lab 2 FSMs
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Digital Interfaces
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Video Encoder Checkpoint 2
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Digital Counters (Lecture 16)
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Xilinx FSM Implementation
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Third Examination
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Optimization of RTL Design
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Memory Modules
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FSM Lab 2
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Power, Time, and Homework
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Computer System Organization
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Multiplication Arithmetic Part II
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Finite State Machines Usage
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Components Class Notes
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Combinational Logic Circuits III (Lecture 12)
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FPGA Editor and Lab Logistics
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Lab 3 FSM on Xilinx
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High-Level Design Optimization
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