Queueing Theory, Disk IO, and Buses

Synchronization Mechanisms (Lecture 23)

IO, Buses, and Virtual Memory

Buses, Disks, and RAID Systems

Datapaths Single Cycle

Lecture 19 Advanced Processors III

Basics of Virtual Memory

Review Complex Superscalars and Out-of-Order Memory

Pipelining Control Part II (Lecture 13)

Designing Multicycle Controllers (Lecture 11)

Register Renaming, Branch Prediction, and Out-of-Order Issue

Exercise 2 for Laboratory

ASIP vs ASIC Design Discontinuity

Problem Set 4 (CS152)

Final Project for CS 152

Tool Flow for CAD

Processors Part I (Advanced)

VLIW Machines and Statically Scheduled ILP - Computer Architecture and Engineering

Virtual Memory and Address Translation

Shift, Divide, and Multiply in Verilog

Out of Order Execution Tomasulo Architecture

Caches that Snoop

Section Notes

Introduction to Simics (Section 1)