CMOS Buffer (Variable-Taper)

Optimization and Design of CMOS Gates

Voltage Transfer Characteristic of CMOS Inverters

Speed of CMOS Logic

Pass-Transistor Logic, Decoders, and Ratioed Logic

Phase One Term Project

Design Rules CMOS Inverter & MOS Model

Logic (Dynamic)

Final Examination

Midterm Assessment

Problem Set

Assignment Sheet

Solutions to Homework

IO Interconnect Analysis

Experiment Three

Inverter VTC & MOS Model (Lec 10)

Wire Concepts (Lecture 12)

Logic Concepts (Lecture 13)

Wire Modeling in CMOS Logic (Lec 11)

Logical Effort (Lecture 13)

Domino Logic (Lecture 21)

IC Basics Cost & Mfg (Lec 2)

Adders (Lecture 20)

Timing (Lecture 22)