University of California, Berkeley
ELENG 141 — Introduction to Digital Integrated Circuits
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Domino Logic & Power (Lec 21)
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Lecture 21 Domino Logic - 17 Pages
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Distribution of Clocks (Lec 24)
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Interconnect & Clock Distribution (Lec 24)
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Handling Interconnects (Lec 24)
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CMOS Process Design Rules (Lec 4)
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Logical Effort and Gate Delay (Lec 7)
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Scaling CMOS (Lecture 9)
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Lecture Material
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MOS Model & CMOS Inverter Metrics
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8-bit Adder Design (Speed-Area Optimized)
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Presentation Franchising (EEP142)
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