Tools for FPGA CAD

Verilog FSMs

Report Format and Grading Criteria for Final Project

Evolution of Tech Implementation

Project for CS 150

CS 150 Status Checkpoint

Controller Implementation Details

Implementing Controllers

Logic, Combinational

Analyzers, Scopes, and Chips

Transmission and Reception of Packets Checkpoint 4

DVI Transmitter CH7301C Device

Representations of Combinational Logic

Wire-Wrap Design with SRAM and FIFO

Design of FIFO, SRAM, and Wire-Wrap

Videoconferencing System Project

Project Videoconferencing

Synthesis in Verilog

Verilog Synthesis and FSMs

DRAM (Synchronous)

SDRAM and DRAM Storage

Implementing Sequential Logic

Controller for SDRAM Memory

Course Quiz