Techniques for Debugging

Project Report for CS 150

Final Project for CS 150

Combinational Logic Design

Instructions for ChipScope Demo

Video Encoder Checkpoint 1

AC97 Audio Checkpoint 1

Arithmetic Circuit Design

FIFO Design, SRAM, and Wire-Wrap

Mapping and Simulation in Verilog

Verilog Structural Design

Techniques for Simulation

Synthesis and Simulation Techniques

Finite State Machines (Section 4)

Audio Interface Project Checkpoint 2

Logic that is Programmable

Power Consumption Analysis

Lecture Materials

Digital Design Lecture Notes

Notes from Lecture

Review Session 1 (Lecture 9)

Lecture 7 Notes

FSMs Part I (Lecture 9)

Introduction to Verilog (Part 1)